This application claims the priority benefit of Taiwan application Ser. No. 88123393, filed Dec. 31, 1999.
1. Field of the Invention
The present invention relates to a photolithography process. More particularly, the present invention relates to a method for preventing the generation of side-lobes in a photolithography process.
2. Description of the Related Art
Photolithography plays an essential role during the manufacturing of a semiconductor device. Processes like etching and doping are all accomplished through a photolithography process. In a photolithography process, exposure resolution is an important determining factor for the quality of photolithography. The phase-shifting mask (PSM) technique is employed to provide better resolution, wherein the attenuated PSM is especially effective to project isolated or sparse patterns without adding complexity to the mask making process. Using the PSM, on the other hand, would generate unexpected side-lobes around the main pattern due to the intersection of light diffraction.
FIG. 1 is a schematic, cross-section of a photoresist after the exposure and development processes using the conventional attenuated PSM. As shown in FIG. 1, an opening 106 pattern is formed after exposing and developing the photoresist layer 104 with a mask 100. The region that is not expected to be patterned, however, is also partially exposed due to the summary of light diffraction, forming a side-lobe 108 after development.
The conventional approaches in preventing the generation of side-lobes include increasing the pattern void size and therefore reducing the exposure energy, using mask with a low transmittance rate, or adding auxiliary patterns on the corresponding side-lobe region of the mask. These methods, however, are not very convenient and the processes are complicated.
Based on the foregoing, the present invention provides a simple and effective method to suppress the generation of side-lobes in a photolithography process.
The present invention provides a method to mitigate the generation of side-lobes in a photolithography process, wherein the parameters of the photolithography process, such as the post-exposure baking time and temperature and the soft-baking time and temperature, are adjusted in order to increase the contrast of the photoresist pattern and to suppress the generation of side-lobes.
Accordingly, the present invention provides an increased of the photoresist contrast by adjusting some process parameters to suppress the side-lobe phenomenon. According to a preferred embodiment of the present invention, wherein the method provides a mitigation of the side-lobes generation in a photolithography process. The method includes the steps of forming a photoresist layer on a semiconductor substrate. An exposure is performed on the photoresist layer using an attenuated phase-shifting mask, transferring the pattern on the mask to the photoresist layer. Thereafter, a post-exposure baking process is conducted on the photoresist layer after it has been exposed. A development process is subsequently conducted to complete the patterning of the photoresist layer.
According to a preferred embodiment of the present invention, the post-exposure baking process, performed on the photoresist layer after it has been exposed, is at about 130 degrees Celsius.
According to a preferred embodiment of the present invention, the post-exposure baking process, performed on the photoresist layer after it has been exposed, is for about 90 seconds.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.